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authormanuel <manuel@mausz.at>2012-03-27 11:51:08 +0200
committermanuel <manuel@mausz.at>2012-03-27 11:51:08 +0200
commit4f670845ff9ab6c48bcb5f7bf4d4ef6dc3c3064b (patch)
tree868c52e06f207b5ec8a3cc141f4b8b2bdfcc165c /threads/io.h
parenteae0bd57f0a26314a94785061888d193d186944a (diff)
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reorganize file structure to match the upstream requirements
Diffstat (limited to 'threads/io.h')
-rw-r--r--threads/io.h115
1 files changed, 115 insertions, 0 deletions
diff --git a/threads/io.h b/threads/io.h
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1#ifndef THREADS_IO_H
2#define THREADS_IO_H
3
4#include <stddef.h>
5#include <stdint.h>
6
7/* Reads and returns a byte from PORT. */
8static inline uint8_t
9inb (uint16_t port)
10{
11 /* See [IA32-v2a] "IN". */
12 uint8_t data;
13 asm volatile ("inb %w1, %b0" : "=a" (data) : "Nd" (port));
14 return data;
15}
16
17/* Reads CNT bytes from PORT, one after another, and stores them
18 into the buffer starting at ADDR. */
19static inline void
20insb (uint16_t port, void *addr, size_t cnt)
21{
22 /* See [IA32-v2a] "INS". */
23 asm volatile ("rep insb" : "+D" (addr), "+c" (cnt) : "d" (port) : "memory");
24}
25
26/* Reads and returns 16 bits from PORT. */
27static inline uint16_t
28inw (uint16_t port)
29{
30 uint16_t data;
31 /* See [IA32-v2a] "IN". */
32 asm volatile ("inw %w1, %w0" : "=a" (data) : "Nd" (port));
33 return data;
34}
35
36/* Reads CNT 16-bit (halfword) units from PORT, one after
37 another, and stores them into the buffer starting at ADDR. */
38static inline void
39insw (uint16_t port, void *addr, size_t cnt)
40{
41 /* See [IA32-v2a] "INS". */
42 asm volatile ("rep insw" : "+D" (addr), "+c" (cnt) : "d" (port) : "memory");
43}
44
45/* Reads and returns 32 bits from PORT. */
46static inline uint32_t
47inl (uint16_t port)
48{
49 /* See [IA32-v2a] "IN". */
50 uint32_t data;
51 asm volatile ("inl %w1, %0" : "=a" (data) : "Nd" (port));
52 return data;
53}
54
55/* Reads CNT 32-bit (word) units from PORT, one after another,
56 and stores them into the buffer starting at ADDR. */
57static inline void
58insl (uint16_t port, void *addr, size_t cnt)
59{
60 /* See [IA32-v2a] "INS". */
61 asm volatile ("rep insl" : "+D" (addr), "+c" (cnt) : "d" (port) : "memory");
62}
63
64/* Writes byte DATA to PORT. */
65static inline void
66outb (uint16_t port, uint8_t data)
67{
68 /* See [IA32-v2b] "OUT". */
69 asm volatile ("outb %b0, %w1" : : "a" (data), "Nd" (port));
70}
71
72/* Writes to PORT each byte of data in the CNT-byte buffer
73 starting at ADDR. */
74static inline void
75outsb (uint16_t port, const void *addr, size_t cnt)
76{
77 /* See [IA32-v2b] "OUTS". */
78 asm volatile ("rep outsb" : "+S" (addr), "+c" (cnt) : "d" (port));
79}
80
81/* Writes the 16-bit DATA to PORT. */
82static inline void
83outw (uint16_t port, uint16_t data)
84{
85 /* See [IA32-v2b] "OUT". */
86 asm volatile ("outw %w0, %w1" : : "a" (data), "Nd" (port));
87}
88
89/* Writes to PORT each 16-bit unit (halfword) of data in the
90 CNT-halfword buffer starting at ADDR. */
91static inline void
92outsw (uint16_t port, const void *addr, size_t cnt)
93{
94 /* See [IA32-v2b] "OUTS". */
95 asm volatile ("rep outsw" : "+S" (addr), "+c" (cnt) : "d" (port));
96}
97
98/* Writes the 32-bit DATA to PORT. */
99static inline void
100outl (uint16_t port, uint32_t data)
101{
102 /* See [IA32-v2b] "OUT". */
103 asm volatile ("outl %0, %w1" : : "a" (data), "Nd" (port));
104}
105
106/* Writes to PORT each 32-bit unit (word) of data in the CNT-word
107 buffer starting at ADDR. */
108static inline void
109outsl (uint16_t port, const void *addr, size_t cnt)
110{
111 /* See [IA32-v2b] "OUTS". */
112 asm volatile ("rep outsl" : "+S" (addr), "+c" (cnt) : "d" (port));
113}
114
115#endif /* threads/io.h */